Bullpen.News From Edwin Dorsey
Get Daily Recap Feedback

Tuesday, October 20, 2026

Back to today

Vicor Update, Part Three

Vicor’s $66.6 million in AI power-delivery royalties generated about $50 million of operating profit, eclipsing its module business as revenue reached $197.1 million.

VICR $9.7B
CV's Substack 28 clicks

From X

@convequity

Convequity on X

$TSEM + $SOI: positioned on both sides of the biggest shift in AI datacenter interconnect — and Google's new TPUv8i just supercharged the story. Leg 1 — Smarter optics, much bigger chips. Next-gen optical links ("coherent-lite") encode data far more densely than today's IMDD links. But the sophistication has a physical cost: the photonic chip needs roughly 2–2.5x more silicon area per port, because it packs in multiple modulators, splitters, and detectors where today's simpler links need one of each. Factor in that bigger dies yield worse, and you need ~3–4x the wafer starts per port. More area × more volume × worse yield = several-fold growth in SiPh wafer demand over the cycle. Leg 2 — The switch itself goes photonic. TPUv8i connects its chips through an optical circuit switch (OCS) built from silicon photonics — a genuinely new thing. $GOOGL's old scale-out OCS used MEMS mirrors: zero SiPh content. The new one puts a very large photonic die (300–450mm², heading toward 500–800mm² — near the reticle limit) in every pod. That's a brand-new ~10–20% layer of demand on top of the transceiver story, and it scales faster than linearly as switch radix grows from 64×64 to 128×128. The elegant part: Leg 2 forces Leg 1. The optical switch loses 5–10dB of light — 70–90% of the signal is gone by the time it exits. Today's IMDD transceivers can't read a signal that weak; coherent ones can. So every transceiver plugged into the switch fabric has no choice but to go coherent — and coherent means the 2–2.5x bigger chips from Leg 1. Google's switch decision doesn't just create its own SiPh demand; it automatically triggers the transceiver upgrade too. Tower has manufacturing flows for both legs: high-speed modulator + Ge flows for transceiver PICs, AND mature passive flows for the huge fabric dies. Soitec supplies the photonics-SOI wafers upstream either way — it wins regardless of which foundry takes the socket. One more kicker: Celero, the Alphabet-backed startup tipped for Google's coherent DSP socket, has no fab of its own — its companion photonic chip has to land somewhere, and an open specialty foundry is the obvious somewhere. Risks: coherent modulators migrating to InP/TFLN would leak the PIC leg out of silicon photonics; Marvell verticalizing into its own photonics partially bypasses the open-foundry path.

Investor Letters

All letters

Heico Corporation

HEICO sells FAA-approved aircraft replacement parts at 30% to 50% discounts to OEMs, gaining customers as restrictive aftermarket contracts…

HEI $42B
D Invests 13 clicks

Copper Fox Metals: Research Flash

Copper Fox’s C$9.1 million Schaft Creek program advances metallurgical, tailings, water and road studies toward a pre-feasibility study,…

TECK $29B
Atrium Research - Equity Research 6 clicks

AppLovin Deep Dive

AppLovin rebuilt its ad model with AXON 2.0, lifting LTM revenue to about $7 billion and margins to 77% as Unity competition threatens ad…

APP $92BU $18B
Speedwell Memos 69 clicks

Publications we follow

Every publication on this site, hand-picked.

129 publications

Newsletters 109

YouTube 4

Blogs 15

Seeking Alpha 55 of 247

Nominate a publication

X accounts we follow

Every account on this site, hand-picked.

90 accounts
Nominate an account

Investor letters we follow

190 firms

Sectors

Ordered by how often our editor reaches for them.