Thursday, October 15, 2026

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Is The Market Turning The Page?

CoreWeave’s debt and equity price action is framed as a wake-up call for investors amid a broader market discussion.

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@convequity 3 clicks

Convequity on X

Huawei just updated the Ascend 960 & 970 roadmap. $NVDA's competition pressure is increasing from both $AVGO and Huawei continuously as we've anticipated. → 960DT rollout pulled forward from 4Q27 to 1Q27. (Seems like they are finally getting the HBC-like, tailored-memory approach closer to high-volume production.) → 960PR by 3Q27 with 8 PFLOPS FP4—double the 960DT’s FP4 compute. (Closing in on NVDA’s Blackwell Ultra, which tops out at 15 PFLOPS dense FP4. Rubin moves that target to 35 PFLOPS dense FP4.) → 970 by 2028 with 14 PFLOPS FP4, up from the previous 8 PFLOPS target. Overall, this looks consistent with our Tau Scaling thesis: a higher compute ceiling, more tailored chip designs, and a faster path to production. Not every specification has doubled, but a near-doubling of the 970’s planned FP4 compute alongside an accelerated 960 rollout is a meaningful change. The bigger story, in our view, is Huawei’s CIDM model. Optimizing the entire vertical—not just the logic die—creates more room to change the compute design and shorten the development cycle. Huawei’s disclosed co-optimization already spans devices, circuits, chips and systems. This is the kind of vertical integration Elon Musk is targeting with Tesla and SpaceX’s Terafab. But Huawei is already putting its ecosystem version to work. (Would be quite funny if the Chinese ecosystem gets accelerator-based EUV into production lithography first, too.) Against NVDA, our thesis is that the single-chip gap narrows from roughly three years toward two—and potentially less as the roadmap accelerates. From a PPAC perspective, Tau Scaling could bring the logic die within a year—or less—while memory remains further behind. Bandwidth, not simply capacity, looks like the harder bottleneck. But Huawei may be able to lean into memory capacity and co-design the LLM and serving strategy around that constraint, rather than simply copy something optimized for NVDA’s hardware balance. System-level performance still needs to be proven at the cluster sizes Huawei is targeting. But we would not be surprised if it works better than expected. Even before the full UnifiedBus vision is realized, we think Huawei could gain system-level performance leadership on some large-model workloads sooner than many expect.

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