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We think Google's ($GOOGL) TPU volumes alone could add roughly $11 billion to $14 billion a year to Broadcom ($AVGO) revenue on our illustrative estimates, and Anthropic and OpenAI are a larger opportunity on top. April supply-chain estimates put Google's TPU demand at 4.2 million to 4.5 million units in 2026, rising above 6 million units in 2027. We allow for MediaTek's allocation to rise from around 600,000 units in 2026 to 1 million units in 2027 and assume Broadcom supplies the remainder. At the 6 million-unit level in 2027, that leaves Broadcom with roughly 1.1 million to 1.4 million additional chips compared with 2026. At an illustrative $10,000 of revenue per chip, that would add $11 billion to $14 billion in annual revenue from higher volumes alone. The actual increase will depend on which designs ship and their selling prices. Our working estimates put Anthropic's demand for Broadcom-supplied TPUs at around 1 gigawatt in 2026, rising to 5 gigawatts in 2027. OpenAI's separate custom-chip program has demand estimated at 1.3 gigawatts in 2027 and 5 gigawatts in 2028. Anthropic's TPU purchases overlap with the Google TPU opportunity, so we count those sales once. Together, the Anthropic and OpenAI estimates point to around 10 gigawatts of demand by 2028. Assuming Broadcom earns $10 billion to $20 billion for each gigawatt supplied, that represents a $100 billion to $200 billion revenue opportunity across those deployments.
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Convequity on X

3D chips could create more room for specialist EDA startups. We are not convinced that more difficult chip design automatically translates into a large revenue windfall for $SNPS, $CDNS and Siemens. Fine-pitch stacking changes decisions that used to be made within one die. Put a circuit upstairs and its wires may get shorter, but its heat affects the circuit below. Placement, signal timing and power delivery have to be optimized together across the stack. That creates a reason for $AVGO and $NVDA to build custom tools around their architectures. Broadcom already describes a proprietary design flow built on industry-standard tools. Nvidia publishes its own research on assigning connections across tiers in 3D chips. Our inference is that the chip designers will keep some of the most differentiating optimization work in-house. A startup that solves a costly gap in cross-die planning or optimization could also win business without replacing an entire EDA suite. The incumbents still supply implementation, verification and manufacturing sign-off tools, and they are developing 3D capabilities themselves. Internal tooling is evidence that customers need more than the standard flow; it does not establish that incumbent spending falls. We see a more interesting startup opportunity where a tool can shorten repeated design iterations or improve the resulting chip enough to earn a separate budget. That is the part of the 3D transition we would investigate before assuming the largest EDA vendors capture most of the upside.zz

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