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Broadcom Inc.

AVGO

56 stories

$1.6T Market cap · 2026-10-21

@convequity 1 click

Convequity on X

$NVDA vs $AVGO: The Optical Edge NVIDIA can keep growing while facing pressure from more directions. Custom chips, optical supply constraints and specialized inference systems give customers more reasons to consider alternatives. Broadcom’s optical capabilities could help it win the accompanying compute order. Customers need both accelerators and the optical components that connect them to bring capacity online. Securing those components alongside an ASIC purchase could shift the customer’s platform choice toward AVGO. Control across lasers, photonic and electronic chips, and packaging also gives Broadcom more freedom to optimize the complete design. Embedded lasers could reduce the laser power required, easing dependence on scarce, high-power external lasers, although replacement becomes harder. For AVGO, this remains a potential design route. NVIDIA can respond through partnerships, but separate suppliers still have their own margins and product priorities. Google ($GOOGL) and Amazon ($AMZN) are expanding the alternatives through TPUs and Trainium. Our ABBX model allocates 10GW of Anthropic’s 13.8GW planned capacity to those two platforms. The plans span different timelines, but show how a few large buyers could redirect substantial spending away from GPUs. Huawei adds pressure through its integrated optical approach and the prospect of Chinese models supplying cheaper tokens internationally. That could affect both hardware choices and the prices compute providers can charge. Cerebras ($CBRS) targets workloads where faster responses matter. It can compete for latency-sensitive decoding without replacing GPUs across every stage of inference. NVIDIA’s defenses remain substantial. GPU batching supports high total output, flexibility across workloads matters, and its ecosystem is deeply established. Customers can use GPUs for prefill and specialized chips for decoding. Wider enterprise model development would also favor NVIDIA because smaller buyers have less reason to fund custom-chip programmes. At comparable valuations, we prefer adding to AVGO: it can benefit from custom-silicon adoption while helping customers secure the optics needed to deploy it. For NVIDIA, the key question is how much market share and pricing power it retains as customers gain more alternatives.
@convequity

Convequity on X

Huawei's finer bonding deserves more weight in the AI-chip race. $AVGO's 3.5D approach combines vertically stacked dies with the side-by-side packaging used to connect processors and HBM. It adds another direction in which designers can shorten the wires moving data around a chip. Besi describes Broadcom's initial face-to-face hybrid bonding at 6µm pitch. Huawei reports 1.5µm for its 2026 Kirin implementation. Pitch is the spacing between connections; face-to-face brings the dies' wiring surfaces together. On an identical square grid, that spacing difference allows 16x as many potential bond sites per unit area. Usable connections still depend on routing and the space reserved for power and repair. It is an architectural opportunity, not a bandwidth multiple. The size qualification matters. Kurnal's Kirin 9050 die shots measure roughly 121mm² per die. Extending fine-pitch bonding to much larger AI dies changes the economics: more expensive silicon is at risk when a stack fails, and heat and power delivery have to work across the whole assembly. Broadcom also said face-to-face compute SoC shipments began in February 2026. A later roadmap cannot be read as its first arrival at face-to-face bonding. Huawei looks ahead on this published pitch comparison. Our view is that this gives it a credible route to narrowing parts of the AI-chip gap through packaging. The stronger claim needs production evidence at large accelerator scale. The phone result alone does not establish when that arrives. Builds on Convequity's Huawei After Sanctions, Parts 1–2, 10 & 18 Sep 2026, with updated source checks.
@aleabitoreddit

Serenity on X

Memory LTAs span until 2031. $AVGO expects 100% supply constrained growth Y/Y for next 2 years. $NVDA expects 70% supply constrained growth next year (implying year after that demand keeps up). $SIVE CEO said there's a massive demand supply imbalance for lasers for at least the next 3-5 years. I think semi supply chain growth needs to be re-accessed year by year, but at least for the next year and half I see unprecedented growth.
@Fierce__beast 1 click

Fierce_beast on X

This is the shape of many AI related beneficiaries that I think is the most likely path, a few bumps along the way of course, but more or less the path: $AVGO is an interesting example it has expected EPS growth that looks almost exactly like this, but it doesn't trade for 67.5x, it trades for 20x, which seems to imply that earnings growth rate expectations will pretty dramatically slow down within the next 12-24 months. This doesn't seem likely to me. Of course when I say expected EPS these views are extrapolations of near-term trends and discussions about long-term demand, but all i am making a point about is that if $AVGO's estimates actually materialize roughly like the consensus estimates think, the stock should probably be at least 100% higher.
@convequity 3 clicks

Convequity on X

Huawei just updated the Ascend 960 & 970 roadmap. $NVDA's competition pressure is increasing from both $AVGO and Huawei continuously as we've anticipated. → 960DT rollout pulled forward from 4Q27 to 1Q27. (Seems like they are finally getting the HBC-like, tailored-memory approach closer to high-volume production.) → 960PR by 3Q27 with 8 PFLOPS FP4—double the 960DT’s FP4 compute. (Closing in on NVDA’s Blackwell Ultra, which tops out at 15 PFLOPS dense FP4. Rubin moves that target to 35 PFLOPS dense FP4.) → 970 by 2028 with 14 PFLOPS FP4, up from the previous 8 PFLOPS target. Overall, this looks consistent with our Tau Scaling thesis: a higher compute ceiling, more tailored chip designs, and a faster path to production. Not every specification has doubled, but a near-doubling of the 970’s planned FP4 compute alongside an accelerated 960 rollout is a meaningful change. The bigger story, in our view, is Huawei’s CIDM model. Optimizing the entire vertical—not just the logic die—creates more room to change the compute design and shorten the development cycle. Huawei’s disclosed co-optimization already spans devices, circuits, chips and systems. This is the kind of vertical integration Elon Musk is targeting with Tesla and SpaceX’s Terafab. But Huawei is already putting its ecosystem version to work. (Would be quite funny if the Chinese ecosystem gets accelerator-based EUV into production lithography first, too.) Against NVDA, our thesis is that the single-chip gap narrows from roughly three years toward two—and potentially less as the roadmap accelerates. From a PPAC perspective, Tau Scaling could bring the logic die within a year—or less—while memory remains further behind. Bandwidth, not simply capacity, looks like the harder bottleneck. But Huawei may be able to lean into memory capacity and co-design the LLM and serving strategy around that constraint, rather than simply copy something optimized for NVDA’s hardware balance. System-level performance still needs to be proven at the cluster sizes Huawei is targeting. But we would not be surprised if it works better than expected. Even before the full UnifiedBus vision is realized, we think Huawei could gain system-level performance leadership on some large-model workloads sooner than many expect.

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